1. Field of the Invention
The present invention relates generally to data driven type information processors, and more particularly, a plurality of data driven type information processors connected to each other to form a system so as to allow field constitution of data packets to be processed by each data driven type information processor to be varied.
2. Description of the Background Art
FIGS. 4A and 4B are diagrams showing an arrangement of a system structured by connecting a plurality of data driven type information processors to be applied in a prior art system and a system for one embodiment of the present invention.
FIGS. 4A and 4B show systems structured by connecting, for example, four data driven type information processors. In a connection example 1 of FIG. 4A, data driven type information processors (hereinafter referred to as a data driven type processor) 100, 101, 102 and 103 are connected in parallel. The system of FIG. 4B is structured by connecting the data driven type processors 100 to 103 in series.
Each of the data driven type processors shown in FIGS. 4A and 4B has two transmission paths connected for input/output. Processor numbers #0 to #3 are respectively allotted to the data driven type processors 100 to 103 in advance. In FIG. 4A, an output end of the data driven type processor 100 with the number #0 is connected to an input end of the data driven type processor 103 with the number #3 through a transmission path 20 and is also connected to an input end of the data driven type processor 102 with the number #2 through a transmission path 21. An output end of the data driven type processor 102 with the number #2 is connected to an input end of the data driven type processor 100 with the number #0 through the transmission path 20 and is also connected to an input end of a data driven type processor (not shown) with the number #4 through the transmission path 21. An output end of the data driven type processor 103 with the number #3 is connected to an input end of the data driven type processor 101 with the number #1 through the transmission path 20 and is also connected to an input end of a data driven type processor (not shown) with the number #5 through the transmission path 21.
In the system of FIG. 4B, the data driven type processors 100 to 103 each have an output end connected to an input end of a data driven type processor in a succeeding stage through the transmission paths 20 and 21.
FIG. 5 is a block diagram showing a data driven type processor to be applied to the prior art system.
FIG. 6 is a diagram showing an example of a field constitution of data packets in a data driven type processor to be applied to the prior art system and a system for one embodiment of the present invention.
A data packet PA of FIG. 6 is constituted by a destination field F.sub.1, an instruction field F.sub.2, a data 1 field F.sub.3 and a data 2 field F.sub.4. The destination field F.sub.1 stores destination information D, the instruction field F.sub.2 stores instruction information C and the data 1 field or the data 2 field stores operand data OP. FIG. 7 shows an example of a conventional constitution of the destination field F.sub.1 of the data packet PA shown in FIG. 6. In FIG. 7, the destination field F.sub.1 further includes a processor number field F.sub.13 and a node number field F.sub.14, the processor number field F.sub.13 storing processor number data PE.sub.1 and the node number field F.sub.14 storing node number data ND. The destination field F.sub.1 has a fixed bit width d, the processor number field F.sub.13 has a bit width p and the node number field F.sub.14 has a bit width n, with d=p+n established (p and n are fixed values).
A data driven type processor 100i (i=1, 2, 3, . . . , n) of FIG. 5 includes junction portions 0, 3 and 4, branching portions 1, 600 and 800, a program storing portion 500, a data pair generating portion 6 and an operation processing portion 7. The junction portion 0 has an input terminal connected to two transmission paths and is connected to the branching portion 600 through a transmission path 9. The branching portion 600 has a storage region 601 for storing processor number data PE for uniquely designating the data driven type processor 100i and is connected to the junction portion 4 through a transmission path 10 and to the junction portion 3 through a transmission path 17. The junction portion 4 has an input end connected to the branching portion 600 through the transmission path 10 and to the branching portion 800 through a transmission path 15, and an output end connected to the program storing portion 500 through a transmission path 11. The program storing portion 500 has an input end connected to the transmission path 11 and an output end connected to the data pair generating portion 6 through a transmission path 12. The data pair generating portion 6 has an input end connected to the transmission path 12 and an output end connected to the operation processing portion 7 through a transmission path 13. The operation processing portion 7 has an input end connected to the transmission path 13 and an output end connected to the branching portion 800 through a transmission path 14. The branching portion 800 has an input end connected to the transmission path 14, a storage region 801 for storing the processor number data PE, and an output end connected to the junction portion 4 through the transmission path 15 and to the junction portion 3 through a transmission path 16. The junction portion 3 has an input end connected to the transmission paths 16 and 17 and an output end connected to the branching portion 1 through a transmission path 18. The branching portion 1 has an input end connected to the transmission path 18 and an output end connected to transmission paths 20 and 21. The transmission paths connected to the input end of the junction portion 0 and the output end of the branching portion 1 serve to establish communication and connection between the data driven type processor 100i and other processors.
FIG. 8 is a diagram showing a part of a field constitution of storage contents of the program storing portion 5 to be applied to the prior art system and a system for one embodiment of the present invention.
The data driven type processor 100i of FIG. 5 stores processor number data PE in advance at the time of power application or the like. The processor number data PE is stored in the respective storage regions of the branching portions 600 and 800 upon operation of an external switch (not shown) to apply a signal. Thus, a series of processings is initiated by setting, in the data driven type processor 100i, the processor number data PE for uniquely designating the data driven type processor 100i.
The data driven type processor 100i externally receives a data packet PA having the field constitution shown in FIG. 6 through a transmission path. The received data packet PA is first applied to the junction portion 0.
The junction portion 0 applies the data packet PA to the branching portion 600 through the transmission path 9.
The branching portion 600 with processor number data PE stored in advance, compares processor number data PE.sub.1 in the destination field F.sub.1 shown in FIG. 7 in the input data packet PA and the previously stored processor number data PE, and outputs the applied data packet PA to the transmission path 10 when the data match with each other. If they mismatch with each other, the branching portion outputs the data packet PA to the transmission path 17.
The data packet PA applied to the transmission path 17 is provided to the transmission path 18 through the junction portion 3 and is further provided to the branching portion 1.
The branching portion 1 switches a transmission path for output according to the processor number data PE.sub.1 of the applied data packet PA. For example, if the processor number data PE.sub.1 is of an odd-number, the data packet PA is sent to the transmission path 20 and if the data packet
is of an even-number, the data packet PA is sent to the transmission path 21.
The data packet PA provided onto the transmission path 10 is applied to the transmission path 11 through the junction portion 4 and is applied to the program storing portion 500.
The program storing portion 500 with the data flow program stored in advance, a part of which program is shown in FIG. 8, reads destination information D.sub.1 and instruction information C.sub.1 in the subsequent order as shown in FIG. 8, by addressing based on node number data ND of the input data packet PA of FIG. 7, and the program storing portion stores the read destination information D.sub.1 and the read instruction information C.sub.1 respectively in the destination field F.sub.1 and the instruction field F2 of the input data packet PA and outputs the packet. The output data packet PA is applied to the data pair generating portion 6 through the transmission path 12.
The data pair generating portion 6 queues data packets PA applied from the program storing portion 500, that is, the data pair generating portion 6 detects two different data packets PA whose destination information D match with each other, stores operand data OP of one of the two data packets PA having the same destination information D, for example, the contents of the data 1 field F.sub.3 of one data packet as shown in FIG. 6, in the data 2 field F.sub.4 of the other data packet as shown in FIG. 6, and outputs the other data packet. The output other data packet PA is applied to the operation processing portion 7 through the transmission path 13. At this time, the remaining data packet PA disappears.
The operation processing portion 7 conducts a predetermined operation processing for the data packet PA applied from the data pair generating portion 6, stores the result in the data 1 field F.sub.3 of the input data packet PA and applies the data packet to the branching portion 800 through the transmission path 14.
Similarly to the branching portion 600, the branching portion 800 stores the processor number data PE in advance. The branching portion 800 compares the processor number data PE.sub.1 in the destination field F.sub.1 shown in FIG. 7 in the applied data packet PA with the stored processor number data PE. If the data match with each other, the data packet PA is provided to the transmission path 15. If they mismatch with each other, the input data packet PA is provided to the transmission path 16.
The data packet PA circulates through the program storing portion 500.fwdarw.the data pair generating portion 6.fwdarw.the operation processing portion 7.fwdarw.the program storing 500.fwdarw. . . . by following the foregoing processing procedure to execute operation processings based on the data flow program stored in the program storing portion 500.
Also in the systems including a plurality of processors 100i as shown in FIGS. 4A and 4B, data packets PA are allotted to the respective processors constituting the system according to the processor number data PE.sub.1.
Also in a system including a plurality of the above-described conventional data driven type processors connected to each other, a field constitution of the destination field F.sub.1 in the data packet PA is fixed as shown in FIG. 7. More specifically, with a bit width of the destination field F.sub.1 being d bits, a bit width p of the processor number field F.sub.13 and a bit width n of the node number field F.sub.14 are both fixed values, wherein d=p+n is established.
When the field F.sub.13 has a bit width of p, the maximum of 2.sup.p data driven type processors can be identified. Therefore, one system can be structured by up to 2.sup.p data driven type processors. However, with data driven type processors of not more than 2.sup.(p-1) used, the field F.sub.13 of the destination field F.sub.1 has some bit left unused. Since the field constitution is fixed, the unused bits cannot be used for the node number data ND to be stored in the same destination field, and the node number data ND is fixed to data of n bits even the processor number field F.sub.1 has unused bits. Therefore, a capacity of an executable data flow program is limited. This also limits an executable program capacity of the system, thereby lowering an operation efficiency.